社区对 SSC338Q 的了解

摘自 Tino Darkness 在 OpenIPC Telegram 群组中的消息。每一条都链接到其出处消息。

• SSC338D/Q is a dual Cortex-A7 according to the SigmaStar datasheet, and two CPU cores are visible in Linux on the SSC338Q. (消息 1, 消息 2)
• As Tino recalls, SSC338D and SSC338Q are the same chip, with 1Gb vs 2Gb DDR. (消息 1)
• A single-core Dhrystone run on an SSC338Q (MC800S module) gives 1695 DMIPS, against 830 for SSC30KQ, 1455 for SSC359G and 1200 for an RPi Zero W; with two cores the 338Q has about 4x the DMIPS of a 30KQ. (消息 1, 消息 2, 消息 3)
• Tino calls the SSC338 an RPi Zero-level processor according to Dhrystone and says it is not that powerful for such tasks (2024-02). By DMIPS he put the SSC338Q on par with a 1 GHz Pentium III in 2024-06, and called it roughly a Pentium II in 2025-05. (消息 1, 消息 2, 消息 3)
• The SSC338Q encoder tops out at 4K (8 MP) at 20 fps, which is an encoder limitation; lower resolutions allow more fps (Tino cited Igor's 1080p@90). For 4K/8 MP at 30 fps use SSC339G. (消息 1, 消息 2, 消息 3)
• As Tino recalls, you can get 720p@120 from an SSC338Q with an IMX415. (消息 1)
• As he recalls, the SSC338 has 3 encoding channels, e.g. one 4K stream for SD recording and one downscaled stream for broadcast. (消息 1)
• As far as Tino understands, SigmaStar engineers would be taken aback to learn how their SDK, with its 60 fps encoder limit, was patched (and what is done with the sensor); in his opinion, if SigmaStar forbids the encoder to exceed e.g. 60 fps at SDK level, they do it for a reason based on their knowledge of this SoC's limitations. (消息 1, 消息 2)
• Tino highly doubts the SSC338/339 can do 12 MP (e.g. with an IMX477 sensor board). (消息 1)
• The SSC338 is a camera SoC with encoder only: no video decoder (VDEC), no VDISP and no video output of any kind. (消息 1, 消息 2)
• There is no ADC / TV input on SSC3XX chips, so the SSC338 cannot handle analog video directly; an analog camera needs a special converter chip, and the SSC338 cannot output an analog signal either. (消息 1, 消息 2, 消息 3)
• SSC338 with an IMX415 already uses a 4-lane MIPI sensor interface. Chips like the SSC338Q were designed for MIPI/DVP sensors, not as general-purpose SoCs with USB3 like the RK3588. (消息 1, 消息 2)
• The SSC338Q has an integrated eMAC/ePHY, so Ethernet can be wired directly to a router or PC; a transformer/MagJack is preferable for longer distances. (消息 1)
• The I2C bus from the SSC338Q datasheet is an I2C-SPI debug bridge that users should not need, and even if usable it would interfere with PM-UART; to read I2C devices (e.g. an INA219), hang something like an RP2040 on the SSC338's USB. (消息 1)
• On an Anjoy MC800S (SSC338Q), md.w 0x1f003c00 in u-boot returns 00f1, and the device tree machine model reads "INFINITY6E SSC012B-S01A". On that board u-boot is not locked. (消息 1, 消息 2)
• A BROM dump of the SSC338 (md.b 0x0 0x8000) ends with the signature MVX4######gce02feaI6e_ROM####XVM. (消息 1)
• Tino says that if an adapter used an FT2232 plus some TTL chips like the original MStar/SigmaStar debug adapter, an SSC338 could be recovered without a CH341A flash programmer in addition to UART. (消息 1)
• Any SSC chip, the SSC338 included, can do secure boot via fuses, but not many vendors make use of it. (消息 1)
• On stock firmware the CPU runs at 1.0 GHz (scaling_max_freq 1000000, performance governor) with a 900 mV core voltage. Writing 1200000 to /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq overclocks it to 1.2 GHz (reads back 1200000). (消息 1, 消息 2)
• The SSC338Q IPU (NPU) clock defaults to 800 MHz and is rated up to 900 MHz; it is set with devmem writes to 0x1F206B80/0x1F206B84. In Tino's notes 1000 MHz is an overclock that passed 50/50 without a voltage bump but may fail under load, and 1100 MHz risks silent computation errors. (消息 1)
• The SSC338 NPU is the IPU100 IP block, a "Deep Learning Accelerator (DLA)" usable for recognition; Tino says the original Jetson Nano has about the same TOPS. (消息 1, 消息 2, 消息 3)
• Tino's NPU figures vary: 'several TOPS' (2024-06), 0.5 or 1 TOPS (2025-03), and an old 0.5 TOPS part (2026-06). (消息 1, 消息 2, 消息 3)
• Tino thinks the SigmaStar NPU needs a separate NDA. (消息 1)
• There are not many spare CPU resources on SSC338/30KQ, so using NEON for anything is justified, especially for heavy stuff like WFB; running encoder, router and WFB all on an SSC338 can be done but may run short of resources. (消息 1, 消息 2)
• Tino thinks the SSC338 (or SSC339) is powerful enough to run OpenCV on its own. (消息 1)
• Typical consumption of an SSC338 module is about 12 V / 0.1-0.2 A, though Tino says this should be measured. A 12 V supply is a requirement of a specific board, not of the 338Q itself; SSC chips are used in 5 V baby-monitor cameras. (消息 1, 消息 2)
• Tino calls SSC338/339 power-hungry chips, and notes that even in CCTV, powerful SoCs like the 338 are put on a separate board because they get hot. (消息 1, 消息 2)
• As Tino recalls, the SSC338 LDC does only Y-correction, while X/Y correction is on more expensive SoCs (he says he could be wrong). (消息 1)
• The SSC338 is not a BGA package. (消息 1)
• In the OpenIPC build configuration the SSC338Q belongs to infinity6e. As Tino recalls, Majestic on SSC338 could already produce slices as of 2024-04, and as of 2026-02 Ruby/Onyx still depend on the third-party Majestic for SSC338. (消息 1, 消息 2, 消息 3)
• Tino referred to legal documentation for the SSC338/30KQ Pudding SDK. Besides Linux, SigmaStar has an RTOS for the 338Q that avoids kernel-userland ping-pong but is hard to program (for enthusiasts or pros). (消息 1, 消息 2)
• Tino's rough ranking, weakest to strongest: ssc335/377, ssc335de, ssc337DE, ssc378DE, ssc30kd, ssc30kq, ssc338q, ssc339g, ssc359. As he recalls, one SSC338 core has about twice the DMIPS of one SSC30KQ core. (消息 1, 消息 2)
• The 338 is a Cortex-A7 while SSC377/378 are Cortex-A35, and the newer chips should be just as good, in some ways better, and not more expensive. Tino would compare the SSC378 to the 30KQ/338 (and 377 to 335/337, 379 to 339). (消息 1, 消息 2)
• There is no MSC338Q; the chip is the SigmaStar SSC338Q. SigmaStar is the former MStar, now a division of MediaTek. (消息 1)
• The bare SSC338Q chip was about 55 CNY on Taobao in 2025-09; the datasheet, SDK and the rest are under NDA. (消息 1)
• As of 2024-03 SSC30KQ/338 could not always be found on AliExpress, and Tino expects the 338 to become harder to find than newer chips (as happened with MSC313E); for a new custom module he advises the newer SSC377/378. (消息 1, 消息 2, 消息 3)
• Tino sees the 338 as an ordinary, conservative CCTV SoC and thinks it would likely have been discontinued long ago without the surge in sales caused by OpenIPC. (消息 1, 消息 2)
• (Infinity6E family) Infinity6E (I6E) covers SSC30KD, SSC30KQ, SSC338 and SSC339; it is a different family and SDK from the I6 SSC325. Tino lists it as a separate family from I6B0 (SSC335) and I6C (SSC377/378). (消息 1, 消息 2)
• (Infinity6E family) The I6E SDK codename is Pudding, and SigmaStar demo code for I6E lives under "alderaan" ("jedi" is for I6B0). (消息 1, 消息 2, 消息 3)
• (Infinity6E family) The same Majestic build serves SSC338, SSC339 and SSC30Kx, all I6E (Pudding). As far as Tino knew in 2024-04, only I6E and I6B0 SigmaStar SoCs were supported in OpenIPC. (消息 1, 消息 2)
• (Infinity6E family) SSC336/338/339 have proprietary 0.5-1 TOPS hardware NN accelerators, and as Tino understands it SSR6xx, SSC336 and SSC338 should share the same AI core. (消息 1, 消息 2)
• (Infinity6E family) Tino said the SigmaStar DLA/IPU model tool (SGS tools page in the Pudding docs) seems to require a separate NDA and is not free (2024-02). (消息 1)
• (Infinity6E family) Pudding SDK documentation is published at wx.comake.online/doc/doc/SigmaStarDocs-Pudding-0120/, but as of 2026-08 CoMake's new website has no Pudding SDK download (only SSC305/309 for camera SoCs). (消息 1, 消息 2)
• (Infinity6E family) Infinity6E uses dynamic voltage and frequency scaling (DVFS). (消息 1)
• (Infinity6E family) On an Anjoy board the core voltage is selected by PAD_PM_GPIO7/8 through a device-tree table, vid_voltages = <850 900 950 1000>. Tino calls changing the top entry from 1000 to 1050 'a way to fry your SoC', and says to do it only if TEMP_R is not too high. He says this should apply to most Infinity6 chips and gives 1.05 V as the max. (消息 1, 消息 2)
• (Infinity6E family) Devices with secure boot enabled require signed, or signed and encrypted, binaries (see the SSC9381G/9351 Pudding OTP-Key docs). (消息 1)
• (Infinity6E family) SigmaStar boot-select straps offer more than two combinations (NOR, NOR+SD, NAND, ...). (消息 1)
• (Infinity6E family) For a native FPV venc on I6E, start from st_main_venc.c in the SDK, a simple ~2 KLoC source; the venc and other hardware blocks are documented in the Pudding mi_venc docs. (消息 1, 消息 2)
• (Infinity6E family) I6E and I6B0 use the "old" style SigmaStar ABI, e.g. MI_VENC_CreateChn(VeChn, pstAttr) without a device argument. (消息 1)
• (Infinity6E family) It looks like the OpenIPC SDK headers are closer to I6B0 (Ispahan) than I6E (Pudding), so some enums/structs will not match exactly. In some SDK versions (he remembers I6B0 and I6E) functions are declared in headers but missing from the .so. (消息 1, 消息 2)
• (Infinity6E family) On I6E (SSC30KQ), MI_VENC_CreateChn must be called before MI_SYS_BindChnPort2, otherwise dmesg shows the channel is not created and bind errors. (消息 1)
• (Infinity6E family) H.265 slice split (MI_VENC_SetH265SliceSplit, u32SliceRowCount 16) is in Tino's working code on Pudding/I6E. In 2024-01 he thought slicing could be enabled in Majestic with a couple of lines via the new public plugin API. (消息 1, 消息 2)
• (Infinity6E family) Some things cannot be done from a Majestic plugin: e.g. slice mode only works if the VENC is initialised in frame mode or similar, and an already built pipeline cannot be touched. (消息 1)
• (Infinity6E family) The SigmaStar encoder's intra-refresh mode emits no SEI NAL units (a NAL dump shows only IDR, PPS, SPS, TRAIL_N/R and VPS), and Tino has found no sign it can do SEI recovery points/GDR; arbitrary SEI can be injected with MI_VENC_InsertUserData. (消息 1, 消息 2)
• (Infinity6E family) Tino suggests the SigmaStar hardware encoder does not support B-frames. (消息 1)
• (Infinity6E family) I6E/Pudding chips such as SSC338 support lens distortion correction (LDC) in the VPE, which Tino calls somewhat unique (internal VPE LDC/SCL). As he recalls, on SSC338/Pudding LDC works only in Y, while Maruko and later do X/Y. (消息 1, 消息 2, 消息 3)
• (Infinity6E family) The Pudding VPE has a good, smooth digital zoom (MI_VPE_LoadPortZoomTable / MI_VPE_StartPortZoom), which Tino checked. MI_VPE_SetPortMode can also up-scale, but with risk of FIFO FULL in realtime mode. (消息 1, 消息 2)
• (Infinity6E family) Tino doesn't think downscaling the sensor image (e.g. to 1080p) on I6E needs the CPU; he points to the DIVP hardware block and believes Majestic already uses it. He thinks scaler parameters may be changeable without restarting the pipeline as long as the output SPS/PPS does not change, perhaps using SNR->VIF->VPE->VDIVP->VENC, but says this should be checked. (消息 1, 消息 2)
• (Infinity6E family) Tino thinks Majestic already uses real-time VIF-VPE binding on I6E, and IIRC connecting RGN directly to VPE is possible only on I6E. (消息 1, 消息 2)
• (Infinity6E family) A raw sensor frame can be dumped through the MI VIF procfs, e.g. echo dump 0 0 /tmp > /proc/mi_modules/mi_vif/mi_vif0. For per-module debug logging, /proc/mi_modules/mi_log_info is a better route than UART console messages. (消息 1, 消息 2)
• (Infinity6E family) For an OSD on SigmaStar you need to draw TTF text onto an ARGB1555 surface. The VDF module has CCTV-related APIs for MD/OD/VG (motion detection, occlusion detection, virtual gate), and the Pudding IVE has an image shift detector. (消息 1, 消息 2, 消息 3)
• (Infinity6E family) UVC (USB camera) support for I6x is documented in the Pudding (SSC9381G/9351) docs; I2M is the NVR family, not the I6x camera family. (消息 1)
• (Infinity6E family) OpenIPC's sigmastar-osdrv-infinity6e package includes kernel modules such as mi_ipu.ko and mi_gyro.ko. It looks like mi_gyro.ko supports only ICG-20660, ICG-20330 and ICM-40607 IMUs out of the box, over I2C (default) or SPI, with CCTV-style EIS. (消息 1, 消息 2)
• (Infinity6E family) On I6E the mhal is monolithic and almost as big as the Linux kernel. (消息 1)
• (Infinity6E family) SigmaStar IQ files from different SDK versions are usually incompatible, let alone across families such as I6E vs I6C. (消息 1)
• (Infinity6E family) As of 2024-05-07, mini-i6e and mini-i6c were in progress at the same time. (消息 1)
• (Infinity6E family) As of 2026-06, Tino said Anjoy is already mostly switching to the SSC37x series even for the low end (SSC373), and that once Anjoy runs out of its old SSC338Q/30KD/30KQ stock 'we'll find out right away'. His impression is that few modules still use SSC338/30KD/30KQ and no new ones are made; new ones are mainly SSC377/378/373/375/38x. (消息 1, 消息 2)